EMRFD Message Archive 9837

Message Date From Subject
9837 2014-03-18 17:58:58 gt25psi2002 Biasing a NPN for Optimal Q-Point
Hi there,

1.    I've read a book saying that higher Ve (voltage across emitter) value is better for distortion free circuit.
Does this imply that Ve can go as high the figure that make V across Ic is 0 i.e. Rc=0?
[I've seen many good circuits using 2n5109 with Rc=0].

2.    The above advice complies to another source (referring to a web site) saying that the lower Rbb/Re ratio is better.

3.    While another source referring to a web site says the ratio of Vc/Ve should be about 75%/25%.

Please advise me which direction is correct.

Regards.   
9838 2014-03-19 00:54:42 Russell Shaw Re: Biasing a NPN for Optimal Q-Point
9839 2014-03-19 07:07:09 Chris Trask Re: Biasing a NPN for Optimal Q-Point
>
>1. I've read a book saying that higher Ve (voltage across emitter) value is better for distortion free circuit.
>Does this imply that Ve can go as high the figure that make V across Ic is 0 i.e. Rc=0?
>[I've seen many good circuits using 2n5109 with Rc=0].
>

It is correct to say that a higher Vce will resort in lower distortion as doing so will place the operating point away from the transition zone, where most of the distortion occurs. Take a look at my two papers on transistor selection, which show curve families for a variety of devices with some discussion about distortion:

http://www.home.earthlink.net/~christrask/Paper015.html

http://www.home.earthlink.net/~christrask/Paper016.html

>
>2. The above advice complies to another source (referring to a web site) saying that the lower Rbb/Re ratio
>is better.
>

Haven't seen this comment. Could you provide a URL for it?

>
>3. While another source referring to a web site says the ratio of Vc/Ve should be about 75%/25%.
>

Haven't seen that one either (URL?). However, for an amplifier having a resistor from the collector to Vcc the best dynamic range is obtained when Vce is 0.5*Vcc. Far better dynamic range is obtained with an inductor or transformer winding between the collector and Vcc.




Chris Trask
N7ZWY / WDX3HLB
Senior Member IEEE
http://www.home.earthlink.net/~christrask/
9840 2014-03-19 08:01:51 gt25psi2002 Re: Biasing a NPN for Optimal Q-Point
Dear Russell Shaw & Chris Trask,

Thank very much.

The book I referred to is "RF Circuit Design" by Chris Bowick, 2nd Edition, page 128:-

a).    "Equation 6-1 tends to imply that the higher VE is, the better".
b).    "This equation (Eq. 6-2) indicates that once a transistor is specified, the only control that the designer has over the effect of β changes on collector current is through the resistance ratio RB/RE. The smaller this ratio, the less the collector current varies.
c).    Whereas reference to "the ratio of Vc/Ve should be about 75%/25%" is a URL which I still cannot relocate where it is.

Regards.