EMRFD Message Archive 4153
Message Date From Subject 4153 2010-02-02 11:59:57 Glen Leinweber Fools proceed
Was thinking this might apply (to me) after reviewing
Wes' Colpiitts oscillator analysis in "Introduction to
Radio Frequency Design". He stuck with linear
analysis in determining start-up conditions. I just
keep banging my head against the non-linear wall.
Fer'instance:
An oscillator output is often required to drive a
digital input. In EMRFD, this is often accomplished
with a simple common-emitter circuit with some
resistive feedback from collector to base. The output
drives a HCMOS gate. I'd say this is OK for non-
critical cases, like driving frequency counters.
Another example in DDS chips uses a comparator
to "digitize" the analog-to-digital output.
Another example: A PLL uses a divider chain in
the feedback loop to multiply the reference freq. up
to some higher frequency output. Most PLL's also
convert input signal to digital for phase comparison.
All these examples have considerable potential to
add phase noise to an otherwise clean oscillator.
This process is non-linear and can't easily be simulated
by SPICE. Phase noise can be made worse by
Vcc or ground noise mixing into the digital realm. I'd
guess this is far worse problem than transistor
noise. The specs for a comparator of interest here are
"power supply rejection", and "common-mode rejection".
Both always degrade at the high-frequency end of the
operating range.
I've used ECL line receivers (10116) for comparators,
but haven't yet tried to see what phase noise they add.
Harold Johnson uses MAX496 buffer in his low-noise
oscillator "Helical Resonator Oscillators" (on the EMRFD
cd-rom), but didn't say how he converted to digital. He
also took pains to reduce noise on his Vcc lines, and
was careful to use synchronous frequency dividers.
What comparator circuits have folks found acceptable?
What comparators DON'T add glitches to Vcc/Gnd?
(NE555's & all HCMOS are bad, ECL is better).
Which comparator chips work well at HF, VHF and
have good power supply rejection? We'll see a
lot more UHF oscillators being divided down for
use in HF receivers/transmitters in future. Each divide-by
two SHOULD reduce phase noise by 6dB.
I figure my head-banging will have one of three results:
1) enlightenment (I hope)
2) knock some sense in: (stay outta non-linear trouble)
3) knock all sense out ;-)4154 2010-02-02 12:32:11 Tayloe Dan-P26412 Re: Fools proceed
power than a
lot of the high speed digital ICs, plus the ACT family tends to take a
sine wave and
make a more symmetrical square wave out of it than a lot of other
families. I think
the use of a squaring circuit help squeeze out some of the noise in the
LO so that
rather than having noise all the way along the sine wave, the noise gets
limited to
just the rising and falling edge. I was able to get ~ 145 dB of
blocking dynamic
range, and I place the ability of obtaining that to a clean LO signal,
which included
the LO squaring circuit.
I believe I used a dedicated regulator for the digital parts that were
handling the LO
signal.
- Dan, N7VE
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4161 2010-02-02 17:20:23 Anthony Gabriel S... Re: Fools proceed
blocking dynamic range" Dan, N7VE [...]
So, you recommend use a squared LO for our designs?
73's
Anthony
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[Non-text portions of this message have been removed]4163 2010-02-02 20:30:00 Tayloe Dan-P26412 Re: Fools proceed
phase direct conversion integrating detector. That part needs two
digital clock lines to control the routing the analog RF input to one of
four detector capacitors, doing a switch every 1/4 RF cycle across all
four detector caps one at a time. A digital LO clock was what was
needed to run this chip.
I am just saying that the squaring process naturally eliminated some of
the noise that was contained in the LO sine wave, so there was
additional unexpected benefit to the squaring (limiting) process of
converting the LO sine wave to a digital square wave.
If you really needed a sine wave LO, there might be benefit to squaring
the LO to a square wave to squeeze out some of the noise via limiting,
then low pass filtering the result to get back to a cleaner sine wave
again.
- Dan, N7VE
[...] "I was able to get ~ 145 dB of
blocking dynamic range" Dan, N7VE [...]
So, you recommend use a squared LO for our designs?
73's
Anthony
[Non-text portions of this message have been removed]4164 2010-02-02 22:58:32 drmail377 Re: Fools proceed
When using a square wave as an LO, do we have to consider LO/RF and/or LO/IF isolation? It seems with a square wave, unwanted LO products may appear on the IF and RF ports. Typical LO/RF or IF isolati4169 2010-02-03 05:49:02 Chris Trask Re: Fools proceed
> A pure sine wave has no harmonics. A square wave has no even
> harmonics, only odd harmonics each with a level relative to
> the first order by 1 over N, where N is the order (e.g., the
> third order harmonic is down by 1/3rd).
>
>The datasheet for the 74HC4316 states that the feedthrough from the control line to the analogue line is 100mV for +5V and 250mV for +/-5V supply. That may seem pretty poor, but it's far better than for a single diode mixer which has virtually no LO/IF isolation. But, when using the quad of those as a double-balanced mixer the noise will cancel to a fair degree and it should be better than for a DRM.
> When using a square wave as an LO, do we have to consider LO/RF
> and/or LO/IF isolation? It seems with a square wave, unwanted
> LO products may appear on the IF and RF ports. Typical LO/RF or
> IF isolation in a diode ring double balanced mixer runs around
> 30-45dB. A digitally controlled analog switch might have much
> higher isolation(?)
>
Chris Trask
N7ZWY / WDX3HLB
Senior Member IEEE
http://www.home.earthlink.net/~christrask/4171 2010-02-03 07:05:39 AD7ZU Re: Fools proceed
The 74CBT3253 is produced by several manufactures have any measurements been done across manufactures for the same part?
just curious..
Randy
AD7ZU
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4174 2010-02-03 07:29:13 Tayloe Dan-P26412 Re: Fools proceed
folks that have seem to prefer the Fairchild FST3253.
- Dan, N7VE
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4176 2010-02-03 10:38:46 Glen Re: Fools proceed
Was curious about port-to-port isolation for DPDT analog switches, so
measured L.O.-to-R.F. isolation for Pericom's PI5A319. Found it to be
similar to diode DBM's - in the -40dB to -45dB ballpark.
Perhaps charge injection is the culprit. These switches use pretty
big FETs that have significant interelectrode capacitances. I'd agree
with Chris that N & P mosfets can balance charge injection. Otherwise
port-to-port isolation would be poor.
Note that turning switches on and off require that these capacitances
be charged & discharged. Charging currents all come from the Vcc Vee
supplies, and can cause significant glitches, if supplies are not
carefully bypassed.
Thanks Dan, for your suggestion of ACT devices to drive the buss
switch "L.O." input. I'd have thought these devices would have poor
power supply rejection ratio (PSRR) when used as comparators. Threshold also depends directly4177 2010-02-03 11:14:12 Tayloe Dan-P26412 Re: Fools proceed
value resistor from input to inverted output to bias the part into its
linear range and then AC coupled into the input. This makes the logic
gate look like a very high gain limiting amplifier. This configuration
tends to oscillate all on its own with no input, but since it always has
LO input, it seems to work fine.
That application note looks like an interesting power supply noise
cancelation technique. Amplify the noise and use that to cancel the
noise out.
The LP2985 low drop out voltage regulators that were used in the NC2030
design were a low noise type, 30 uV, as opposed to the 300 uV of noise
referenced in the application note. I understand that in any case, the
power supply noise reduction technique would help reduce this even
further.
- Dan, N7VE
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